1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a power distribution network scheme for effectively supplying a power supply voltage to a highly integrated semiconductor device.
2. Description of the Related Art
As the capacity and switching speed, i.e., operation rate, of semiconductor memories are increasing, the amount of current flowing through the power distribution network (PDN) of the semiconductor memories is also increasing. Thus, a voltage drop in the power distribution network (PDN) has emerged as a concern. In general, a tree structure power distribution network and a mesh-based power distribution network are used in semiconductor memories. The mesh-based power distribution network provides benefits such as less voltage drop and stable power delivery in comparison with the tree structure power distribution network.
In semiconductor memories used in the mobile or graphic industry, column and data paths are disposed perpendicularly to a power supply pad by changing the typical structure of a logic circuit associated with a row region and a column region. Thus, as a power drop occurs differentially in a direction perpendicular to the power supply pad, skew occurs in the column and data path signals. The skew may cause an error in a pipe latch for outputting data during a read operation and inaccurate data may be outputted. Accordingly, a column decoder is separated from a column control region, for controlling the column decoder, in order to reduce the skew occurring in the column and data path signals. When the column decoder is separated from the column control region, having a logic circuit related to data input and output, the error in the pipe latch may be reduced during the read operation but the power lines become weak. The weak power lines cause an error in the power distribution network (PDN). When an external power supply voltage is supplied to a plurality of banks and a voltage pad for supplying the external voltage is far, resistance increases and thus the power supply voltage is unstable. This is because the voltage drops of the multiple banks are different based on their position relative to the voltage pad. As the total resistance caused between the voltage pad and the banks is greater, more current is consumed.